1. Field of the Invention
The present invention relates generally to devices and circuits providing electrostatic discharge (ESD) protection, and more particularly, to devices and circuits providing ESD protection which include silicon controlled rectifiers.
2. Description of the Related Art
The following descriptions and examples are given as background information only.
As is well known in the microelectronics industry, integrated circuit devices are susceptible to damage from applications of excessive voltages, such as, for example, electrostatic discharge (ESD) events. In particular, during an ESD event, charge transferred within a circuit can develop voltages that are large enough to break down insulating films (e.g., gate oxides) on the device and/or dissipate sufficient energy to cause electro-thermal failures in the device. Such electro-thermal failures include contact spiking, silicon melting, and metal interconnect melting. As such, protection circuits are often connected to I/O bonding pads of an integrated circuit to safely dissipate energy associated with ESD events away from active circuitry. Protection circuits may also be connected to power supply pads or between power supply buses to prevent damage to active circuitry.
One approach for providing ESD protection in integrated circuits is to employ a silicon controlled rectifier (SCR) for transferring charge away from active devices of a circuit. Problems, however, arise when an SCR-based ESD protection device is used for power supply protection since holding voltages of SCRs typically used in such devices are lower than operating voltages of the circuits in which they are employed. In particular, due to the relative low holding voltages of SCRs in SCR-based ESD protection devices, an SCR may be triggered and held in the “on” state during normal operation of a circuit and cause catastrophic damage to the circuit. Although the holding voltage of an SCR may be increased by increasing the distance between the cathodic and anodic regions of the SCR, such a solution contradicts the increasing demands in the semiconductor industry to limit and reduce footprint size of circuit devices. As a consequence, there is a trade-off regarding the level of ESD protection offered by SCR-based devices.
Accordingly, it would be beneficial to develop an ESD protection device having a relatively small footprint that allows the holding voltage of an incorporated SCR to be higher than the operating voltage of the circuit in which the device is included.